Method and apparatus for printing large data flows

ABSTRACT

An aspect of the present invention includes a method for patterning a workpiece covered at least partly with a layer sensitive to electromagnetic radiation, comprising the actions of, providing a data representation of at least one image to be imaged onto a plurality of locations of said workpiece, fracturing said data representation into a plurality of field stripes, repeating the actions of rasterizing a first field stripe of said data representation, modulating a modulator according to said rasterized field stripe, imaging said first field stripe onto a plurality of locations of said workpiece, rasterizing a second field stripe of said data representation while imaging said first field stripe onto said plurality of locations of said workpiece, terminating the repetition when a predetermined amount of said image is imaged onto said plurality of locations of said workpiece. Other aspects of the present invention are reflected in the detailed description, figures and claims.

PRIORITY DATA

This application is the National Stage of International Application No.PCT/SE03/00462, filed 19 Mar. 2003; which application claims the benefitof Swedish Application No. 0200864-7, filed 21 Mar. 2002.

TECHNICAL FIELD

The present invention relates to a method for patterning a workpiece, inparticular it relates to a direct-writing lithographic method forforming a desired pattern on a workpiece, such as a mask substrate or anintegrated circuit substrate.

BACKGROUND OF THE INVENTION

In the past, integrated circuits have been manufactured more or lesssolely by using a number of masks or reticles comprising a pattern of alayer in said integrated circuit. In today's integrated circuits thenumber of layers could be larger than 30. Said Masks or reticles may beprepared in lithographical manner by using for example electron beams orlaser beams for exposing a layer of material sensitive for the type ofbeam chosen. The mask material is most commonly transmissive on top ofone of its sides a thin layer of opaque material is attached. In saidthin material the pattern of one layer of said integrated circuit iscreated. The mask has typically N times larger pattern than the patternto be printed on the semiconducting substrate for forming saidintegrated circuit. The reduction in size is performed in a stepper,which uses the mask(s) for forming said integrated circuit.

More recently, the need to manufacture integrated circuits by meansother than using a conventional mask has developed for a number ofreasons, for example the price of manufacturing mask(s) has increaseddue to its complexity to manufacture, small-scale development whichneeds very small series of integrated circuits, etc.

Unfortunately, all of the present known techniques for formingintegrated circuits without using conventional masks or reticles havedrawbacks and limitations.

For example, most direct-writers known in the art are based on electronbeams, typically so called shaped beams, where the pattern is assembledfrom flashes, each defining a simple geometrical figure. Other systemsare known which use raster scanning of Gaussian beams. By using aconventional mask writer, which uses beams of electrons or laser beamsfor forming the pattern on a workpiece, is limited to relatively lowscanning speeds, and, perhaps worst of all, can only scan a singledimension.

SLM writers disclosed in other patent applications, such as WO 01/18606and U.S. patent application Ser. No. 09/954,721 by one of the assigneesof the present invention and hereby incorporated by reference is relatedto raster scanning in the sense that it permits a bitmap pattern, butdistinct by printing an entire frame of pattern in one flash instead ofbuilding the pattern from individual pixels.

A spatial light modulator (SLM) comprises a number of modulatorelements, which can be set in a desired way for forming a desiredpattern. Reflective SLMs may be exposed to any kind of electromagneticradiation, for example DUV or EUV for forming the desired pattern on themask.

A direct-writing pattern generator for writing certain layers in asemiconductor design directly from data would have a high value to theindustry. However, the complexity of modern chips is extremely high andgetting higher by every new technology generation. The direct-writermust write the complex pattern not one, but 100 times on a 300 mm wafer.

FIG. 1 depicts in simplified form a representation for a prior artdirect writer that writes one chip 110 at a time with a particle beam120.

FIG. 2 a illustrates a representation of a conceived direct-writingsystem 200 with multiple e-beam columns 250, a pattern store 240, arasterizing unit 230, a memory unit 220 and column buffers 210. FIGS. 1and 2 a are from material presented by Mark Gesley of ETEC Systems atthe ISMT/SRC Maskless Lithography Workshop 2002 in August the same year.The presentation describes a conceived multiple micro-column e-beamsystem using a raster scan gray-scale principle. The micro-columns forma regular array with from 5×5 to 20×20 mm separation. The array covers asubstantial part of the wafer's area and the stage is scanning only tofill the 5×5 mm (etc.) area. Over scanning into the next micro-columnspace can be used for redundancy. It is however unclear from thepresentation how the information is presented internally. The image ofthe multiple micro-columns indicates that the same data is sent to eachmicro-column and the number of field is equal to the number of columns.

Researchers at UC Berkeley have explored another aspect of handlinglarge data flows. One item to be handled by a direct-writer is theloading of data onto the transducers, here a micro-mechanical SLM. Bycompressing the pattern strongly it is possible to store on hard disksand decompress in several cascaded steps at the time of writing. FIG. 2b is an illustration of a parallel architecture according to UC Berkeleyfor handling large data flows. At least one step of decompression isdone on the SLM chip. By this method both storage and transmissionissues are thought to be solved.

Modern microelectronic designs are so complex that the sheer storage andtransmission of the design files becomes a problem. When the design isflattened out, i.e., when its hierarchy is resolved, the data volumeexpands and finally the volume expands beyond all practical storageoption when it is converted into bitmap. From a design file of typically10–100 G bytes a bitmap volume of 1000 Tbyte is produced for a wafer.The figures are only an indication of the orders of magnitude and willof course change by wafer size and technology node. Only compression isnot going to solve the bandwidth issues of the data flow, since data hasto be processed and modified during conversion to bitmap data. Anexample is that overlap has to be removed and process bias added afterthe removal of the overlap.

What is needed is a method and apparatus, which creates pattern on aworkpiece essentially faster than the prior art techniques and iscapable to handle the large data flows necessary.

SUMMARY OF THE INVENTION

Accordingly, it is an object of the present invention to provide amethod of patterning a workpiece, which overcomes or at least reducesthe above-mentioned problem of time consuming manufacturing times due tolarge data flows.

This object, among others, is according to a first aspect of theinvention attained by a method for patterning a workpiece covered atleast partly with a layer sensitive to electromagnetic radiation,comprising the actions of providing a data representation of at leastone image to be imaged onto a plurality of locations of said workpiece,fracturing said data representation into a plurality of field stripes,repeating the actions of, rasterizing a first field stripe of said datarepresentation, modulating a modulator according to said rasterizedfield stripe, imaging said first field stripe onto a plurality oflocations of said workpiece, rasterizing a second field stripe of saiddata representation while imaging said first field stripe onto saidplurality of locations of said workpiece, terminating the repetitionwhen a predetermined amount of said image is imaged onto said pluralityof locations of said workpiece.

In another embodiment according to the invention, said field stripesbelonging to two consecutive strokes are non adjacent to each other.

In another embodiment of the invention, said field stripes belonging totwo consecutive strokes are adjacent to each other.

In another embodiment according to the invention, said image is imagedonto the workpiece by means of an SLM illuminated by saidelectromagnetic radiation.

In another embodiment according to the invention, said workpiece is awafer.

In another embodiment according to the invention, said image representsan integrated circuit.

In another embodiment according to the invention, field stripesbelonging to two consecutive strokes are imaged in opposing directionsonto the workpiece.

Another aspect of the present invention relates to a method forpatterning a workpiece covered at least partly with a layer sensitive toelectromagnetic radiation, comprising the actions of providing a datarepresentation of at least one image to be imaged onto a plurality oflocations of said workpiece, fracturing said data representation into aplurality of field stripes, repeating the actions of rasterizing a firstfield stripe of said data representation, modulating a modulatoraccording to said rasterized field stripe, imaging said first fieldstripe onto a plurality of locations of said workpiece, rasterizing asecond field stripe of said data representation while imaging said firstfield stripe onto said plurality of locations of said workpiece,terminating the repetition when a predetermined number of said imageshave been imaged onto said plurality of locations of said workpiece.

In another embodiment according to the present invention, said fieldstripes belonging to two consecutive strokes are non adjacent to eachother.

In another embodiment according to the present invention, said fieldstripes belonging to two consecutive strokes are adjacent to each other.

In another embodiment according to the present invention, said image isimaged onto the workpiece by means of an SLM illuminated by saidelectromagnetic radiation.

In another embodiment according to the present invention, said workpieceis a wafer.

In another embodiment according to the present invention, said imagerepresents an integrated circuit.

In another embodiment according to the present invention, field stripesbelonging to two consecutive strokes are imaged in opposing directionsonto the workpiece.

The invention also relates to an apparatus for patterning a workpiece,comprising a memory for storing a data representation of at least oneimage to be written on said workpiece, a fracturing device to fracturesaid data representation into a plurality of field stripes, arasterizing device to rasterize said field stripes, at least two buffermemories to buffer rasterized field stripes, a buffer write control tocontrol into which buffer memory to write the rasterized data, a bufferread control to control from which buffer memory to read rasterized datato be imaged onto the workpiece, a scheduler to schedule which fieldstripe to rasterize, when to buffer rasterized data and when to readdata to be imaged onto the workpiece, and a modulator capable tomodulate a beam of electromagnetic radiation according to saidrasterized data to be imaged onto a plurality of locations of saidworkpiece, wherein said apparatus is capable to rasterize a field stripewhile imaging another field stripe onto said workpiece.

In another embodiment according to the present invention, said workpieceis a wafer.

In another embodiment according to the present invention, said imagerepresents an integrated circuit.

In another embodiment according to the present invention, said image isimaged onto the workpiece by means of an SLM illuminated by saidelectromagnetic radiation.

Further characteristics of the invention, and advantages thereof, willbe evident from the detailed description of preferred embodiments of thepresent invention given hereinafter and the accompanying FIGS. 1–8,which are given by way of illustration only, and thus are not limitativeof the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 depicts a prior art method of patterning a wafer.

FIG. 2 a depicts a conceptual prior art data path for a direct-writerwith an array of micro-columns.

FIG. 2 b illustrates a conceptual prior art data compression circuitthat allows a direct-writer to write from off-line prepared data storedon hard disks.

FIG. 3 depicts an embodiment according to the present invention forforming a pattern on a workpiece.

FIG. 4 depicts another embodiment according to the present invention forforming a pattern on a workpiece.

FIG. 5 depicts a soft reticle and its division into chip stripes.

FIG. 6 illustrates schematically an implementation of the inventivemethod according to FIG. 3 and FIG. 4.

FIG. 7 illustrates how a reticle design is used to create a physicalreticle and/or one or several soft reticles.

FIG. 8 shows a soft-reticle with a repeating chip where only oneinstance need to be rasterized.

DETAILED DESCRIPTION

The following detailed description is made with reference to thefigures. Preferred embodiments are described to illustrate the presentinvention, not to limit its scope, which is defined by the claims. Thoseof ordinary skill in the art will recognize a variety of equivalentvariations on the description that follows.

Further, the preferred embodiment are described with reference to anSLM. It will be obvious to one ordinary skill in the art that actuatorsother than SLMs will be equally applicable; examples are 2-dim modulatorcomprising an array of acoustooptic driven transducers, 2-dim array ofactuators being transmissive, for example of LCD type, or similar 2-dimmodulating devices.

The invention relates to direct-writing of a workpiece, such as asemiconductor wafer or a mask substrate. Using any kind of radiation,i.e., light from IR to EUV, x-ray or particle beams such as electron,ion or atom beams may perform the direct-writing.

The method of the invention off-loads a data path the repetition ofprocessing the same data over and over again for identical chips. Thisis done at the expense of increased mechanical overhead. One of thepreferred embodiments devices a structure where said increasedmechanical overhead is absorbed without a throughput penalty. Thecombination of pattern buffering and a state-of-the-art wafer-scannerstage reduces the data processing by the number of identical fields in arow or on a wafer. For each type of field on the wafer, typically onlyone, the data is rendered into bitmap only once. Furthermore, there is abuilt-in repeat function in each field so that identical chips inside afield need only be rasterized once.

FIG. 3 shows a wafer 301 on a scanning stage 302 under a stationarywriting beam, image forming optics or equivalent writing mechanism 307.The movement 305 of the stage 302 is continuous in strokes 306, eachstroke writes a stripe across the wafer. Said wafer comprises a numberof already prepared chips 303. The area 308, corresponding to a reticlein a stepper, is fractured and rasterized and the data is buffered andreused for several, or all, field along the stripe. The area 308 isdescribed in the input data by a “soft reticle”, a data set that isclosely related to mask file that would be used for producing a realphysical reticle for printing the same field. This will be describedlater in more detail.

The area that is buffered is a so called field-stripe 309, being theintersecting area between the soft reticle 308 and the stripe, includingany stripe overlap needed for the writing and for the data pathprocessing.

The machine starts to write one stripe, taking data from a field-stripebitmap buffer, as soon as the stage and data are ready. Field-stripesare generated in the fracturing step depicted in FIG. 6. While it isperforming the writing of the stroke a second buffer is loaded by bitmapdata produced by the rasterizer. An embodiment is shown in FIG. 6. Thesoft-reticle data is residing in mass storage, typically hard disks. Ascheduler reads the job definition file describing the number of fieldsto be printed, their location, etc. and produces control sequences forthe data path and the stage control. The scheduler directs the fractureunit to fetch the right data and preprocesses it for rasterizing. Thedata is transferred to the rasterizer, employing suitable buffering.

FIG. 5, showing a soft reticle where the dashed frame 501 indicates thequartz substrate if it had been a physical reticle, can furtherexemplify the sequence. The pattern area 502 is divided intofield-stripes 503, optionally overlapping. At a certain moment duringthe writing of a wafer a number of the stripes have been written already506. One field-stripe exists as bitmap data in bitmap buffer 1, see FIG.6. The next field-stripe in the sequence, not necessarily by adjacency,is being rasterized into bitmap buffer 2. The scheduler and the bufferwrite control in FIG. 6 directs the rasterized data to the write bufferwhile the buffer read control directs data from the other buffer to theprint head. The buffer read control has another function as well: itreads the buffered data forward or backwards depending on the directionof the stripe in FIGS. 3 and 4.

Any practitioner in the field will be able to devise alternativehardware structures for FIG. 6. The structure with two separate bufferareas is reasonable since the buffer size for field-stripe is knownbeforehand and, given a maximum field size, will have a constant maximumvalue. But an alternative with a contiguous memory and dynamicallocation of memory is equally useful and may, depending on thedetailed requirements in a particular system type, be preferable. Usingmore than two physical memory areas may also be useful, for example as away of interfacing more than one rasterizing units to one print-head.

FIG. 4 shows another embodiment with a very fast and accurate stagewhere the time to step from one row of fields to the next row, andsettle there within the required placement accuracy, so that it does notcause any practical slowing down of the system. The ATLAS stage used inASML's state-of-the-art scanners has a maximum speed 500 mm per seconds,an acceleration of 12 m/s² and a stepping time from one row to the nextof less than 0.2 seconds. Even at the highest stage speed, 500 mm/s,with a time of writing a stripe across a 300 mm wafer being 0.6 secondsthe mechanical overhead is 25% percent of the total time or less.

More important is that the stepping time is shorter than the time ittakes to change direction of the scanning motion. Therefore themechanical overhead is essentially the same for the schemes in FIG. 3and FIG. 4. It rasterizes the soft reticle 401 only once for the entirewafer, since it writes all occurrences of a field-stripe 402 on thewafer in one go. Since the number of field in a 300 mm wafer isapproximately 100 the reduction in data processing volume compared toFIG. 1 is also a factor 100.

In the preferred embodiment the wafer is written after global alignmentusing alignment marks 304 already placed on the wafer in a previouspatterning step. The marks, four are shown but there can be any numberfrom 2 and upwards and it is also possible to use the printed patternswithin the chips to align to, are measured and an optionally non-linearcoordinate system for the wafer is computed. Alternatively, a distortionfile is read in, created beforehand from measurements or distortionpredictions based on a variety of factors, pattern density, previouslayer distortion, etc. If a separate distortion map is used it iscombined with the measurement of the alignment marks and a coordinatesystem for the wafer is created. The writing of the wafer is then madewith this coordinate system as reference.

Likewise a height map of the wafer is measured before the writing beginsand the focusing of the print head is done by dead count based on theheight map.

FIG. 7 shows how physical and soft reticles are produced from the samemask pattern file. The physical may have several images (pattern areasthat are masked by rulers in the stepper and used separately), alignmentmarks, bar codes, mask process test structures etc. The soft reticle hasa pattern area and optional digital information describing the positionof the alignment marks and their type. It is useful to define a softreticle data structure that allows one soft reticle to include severalsoft reticles each of which has one pattern file. The so-defined reticleformat is closely analog to the physical reticle having several images.

FIG. 7 shows the similarity between soft and hard (physical) reticleswhen they are created, and a corresponding similarity exists when theyare used. Drawn to the extreme this would mean that the same data fileis used for creating them and the same job file is used on thestepper-scanner and on the direct-writer to use them. The job file has aprinciple code like this

Start job, measure height map, align wafer to alignment marks, callreticle #34567, image #1, set dose 100%, set focus-130 nm, exposefields: xxxx.xxxx1 yyyy.yyyy1 xxxx.xxxx2 yyyy.yyyy2 xxxx.xxxx3yyyy.yyyy3 xxxx.xxxx4 yyyy.yyyy4 ... call reticle #34567, image #2xxxx.xxxx103 yyyy.yyyy103 xxxx.xxxx104 yyyy.yyyy104 end job

The stepper calls the reticle from the reticle storage, while the directwriter fetches if from digital storage. In practice the soft reticlesmay need to be adapted to the direct writer, something that is indicatedby the box “DW pre-processing” in FIG. 7. One example is shown in FIG. 8where the mask pattern has four identical chips. Only one of them needto be rasterized and the job file can be modified to create the otherthree parts by repetition of a smaller soft reticle.

A preferred embodiment is a direct writer for 300 mm wafers based on theSLM principle described in U.S. Pat. No. 6,285,488 assigned to one ofthe applicants of the present application and incorporated herein byreference and using 193 nm radiation. It has 4 SLMs, each with 2048×4096mirrors. The projection optics reduces each mirror to a pixel 40 nm insquare on the silicon. Two print 5 wafers per hour including overheadthe flash rate has to be 4 kHz. Each pixel has 65 gray values and isallotted a byte of data. The data rate is then 4×4000×2048×4096=134Gbyte/s. The stage speed is 320 mm/s during the writing stroke and astroke takes 1 second across a 300 mm wafer. The soft reticle size islimited to 38 mm along the stripe and the buffer size is 16 Gbytes. Thesystem has an ATLAS stage as described above and the mechanical overheadper stripe is 17%. Assume a typical pattern of 16×32 mm. The actualbuffered data volume is 14 Gb and there are 19 rows of fields on thewafer. Therefore it takes 19×(1+0.2)=23 seconds to write all fields onthe wafer in one pass. During those 23 seconds the next buffer has to berasterized, which gives the rasterizing capacity 14/23=0.6 Gbyte/s. Therasterizer has been described in U.S. patent application Ser. No.09/954,721 and is running inside the Micronic SIGMA mask writer indevelopment.

If more than one field is printed on the same wafer the neededrasterizing capacity goes up in proportion: 2 different fields require1.6 Gbyte/s, 4 fields require 2.4 Gbytes/s. However, the rasterizer andfracturing module is dimensioned after very complex patterns and withtypical design files it may well be possible to write four differentdesigns on the wafer with 0.6 Gbytes/s.

A second embodiment uses EUV illumination and has a pixel grid of 12.5nm on the wafer. It has 12 SLMs with 2560×8196 mirrors updated at 5 kHz.The data flow is 1258 Gbyte/s, the stage speed is 160 mm/s and onestripe takes 2 second to write. The buffer size if then 256 Gbytes, andthe rasterizing capacity needed is 6.2 Gbytes/s for a single design.

While the preceding examples are cast in terms of a method, devices andsystems employing this method are easily understood. A magnetic memorycontaining a program capable of practicing the claimed method is onesuch device. A computer system having memory loaded with a programpracticing the claimed method is another such device.

While the present invention is disclosed by reference to the preferredembodiments and examples detailed above, it is understood that theseexamples are intended in an illustrative rather than in a limitingsense. It is contemplated that modifications and combinations willreadily occur to those skilled in the art, which modifications andcombinations will be within the spirit of the invention and the scope ofthe following claims.

1. A method for patterning a workpiece covered at least partly with alayer sensitive to electromagnetic radiation, comprising the actions of:providing a data representation of at least one image to be imaged ontoa plurality of locations of said workpiece, fracturing said datarepresentation into a plurality of field stripes, repeating the actionsof: rasterizing a first field stripe of said data representation,modulating a modulator according to said rasterized field stripe,imaging said first field stripe onto a plurality of locations of saidworkpiece, rasterizing a second field stripe of said data representationwhile imaging said first field stripe onto said plurality of locationsof said workpiece, terminating the repetition when a predeterminedamount of said image is imaged onto said plurality of locations of saidworkpiece.
 2. The method according to claim 1, wherein said fieldstripes belonging to two consecutive strokes are non adjacent to eachother.
 3. The method according to claim 1, wherein said field stripesbelonging to two consecutive strokes are adjacent to each other.
 4. Themethod according to claim 1, wherein said image is imaged onto theworkpiece by means of an SLM illuminated by said electromagneticradiation.
 5. The method according to claim 1, wherein said workpiece isa wafer.
 6. The method according to claim 1, wherein said imagerepresents an integrated circuit.
 7. The method according to claim 1,wherein field stripes belonging to two consecutive strokes are imaged inopposing directions onto the workpiece.
 8. A method for patterning aworkpiece covered at least partly with a layer sensitive toelectromagnetic radiation, comprising the actions of: providing a datarepresentation of at least one image to be imaged onto a plurality oflocations of said workpiece, fracturing said data representation into aplurality of field stripes, repeating the actions of: rasterizing afirst field stripe of said data representation, modulating a modulatoraccording to said rasterized field stripe, imaging said first fieldstripe onto a plurality of locations of said workpiece, rasterizing asecond field stripe of said data representation while imaging said firstfield stripe onto said plurality of locations of said workpiece,terminating the repetition when a predetermined number of said imageshave been imaged onto said plurality of locations of said workpiece. 9.The method according to claim 8, wherein said field stripes belonging totwo consecutive strokes are non adjacent to each other.
 10. The methodaccording to claim 8, wherein said field stripes belonging to twoconsecutive strokes are adjacent to each other.
 11. The method accordingto claim 8, wherein said image is imaged onto the workpiece by means ofan SLM illuminated by said electromagnetic radiation.
 12. The methodaccording to claim 8, wherein said workpiece is a wafer.
 13. The methodaccording to claim 8, wherein said image represents an integratedcircuit.
 14. The method according to claim 8, wherein field stripesbelonging to two consecutive strokes are imaged in opposing directionsonto the workpiece.
 15. An apparatus for patterning a workpiece,comprising a memory for storing a data representation of at least oneimage to be written on said workpiece, a fracturing device to fracturesaid data representation into a plurality of field stripes, arasterizing device to rasterize said field stripes, at least two buffermemories to buffer rasterized field stripes, a buffer write control tocontrol into which buffer memory to write the rasterized data, a bufferread control to control from which buffer memory to read rasterized datato be imaged onto the workpiece, a scheduler to schedule which fieldstripe to rasterize, when to buffer rasterized data and when to readdata to be imaged onto the workpiece, and a modulator capable tomodulate a beam of electromagnetic radiation according to saidrasterized data to be imaged onto a plurality of locations of saidworkpiece, wherein said apparatus is capable to rasterize a field stripewhile imaging another field stripe onto said workpiece.
 16. The methodaccording to claim 15, wherein said workpiece is a wafer.
 17. The methodaccording to claim 15, wherein said image represents an integratedcircuit.
 18. The apparatus according to claim 15, wherein said image isimaged onto the workpiece by means of an SLM illuminated by saidelectromagnetic radiation.